20b-linear 100MS/s DAC
Implementation technology: X-FAB 180nm SOI (XT018) 5+1 Metal, Double-MiM Cap for high linearity and low temp. coeff.
Architecture: digital oversampling Sigma-Delta Modulator with 38 current-steering cells and 2-stage 3rd order analog active-RC reconstruction filtering with two fully differential Voltage Amplifiers
Power Supply: 1.8Vdd analog & digital core, 5Vdd analog power output
20bit 10MS/s digital input interpolated (10x, 20x) to 100MS/s as oversampling Sigma-Delta Modulator input
3 different digital scrambler/randomizer implemented: Dynamic Element Matching (DEM), Data Weighted Averaging (DWA) to mitigate transistor mismatch at 20 bit level
Fully differential 2-stage analog signal path with out-of-band noise filtering (> 1,25MHz)